When integrated circuits are connected by a bus, a bus converting circuit, a control device, and the like are provided on the bus according to necessity. For example, there is proposed a memory control device in which a Neumann processor and a Harvard processor are connected on the same bus to enable access to a common memory (see Japanese Patent Publication No. 10-254767).
As a type of an integrated circuit, there is a system integrated processor (SOC: System-On-a-Chip) in which an arithmetic circuit, a DRAM (Dynamic Random Access Memory) controller, a rendering circuit, a peripheral interface control circuit, and the like are integrated. In the SOC, a large number of functions are integrated in one IC (Integrated Circuit) package according to microminiaturization of a semiconductor manufacturing process. On the other hand, since the number of terminals of the IC is under various restrictions on mass productivity such as restrictions on size, cost, and terminal (pin or ball) arrangement, it is difficult to flexibly increase the number of terminals. Therefore, the main purpose of the SOC is to integrate a large number of functions needed for the systems in the IC. Since a bus for transmitting and receiving data to and from an external integrated circuit requires a large number of terminals, the bus tends to be designed with a minimum configuration.
Because of the above reason, an SOC sold as a general-purpose product often adopts a 16-bit data bus. When a controller is connected with the outside of the SOC, a controller of the 16-bit data bus is used. In this case, even if a controller having larger bus width (e.g., a controller of a 32-bit data bus) is sold as a general-purpose product, the number of terminals of the SOC cannot be flexibly increased as explained above. Therefore, it is impossible to realize improvement of a data transfer ability by connecting a controller having large bus width. Therefore, in the past, the data transfer ability is improved by reducing time required for one access of a data bus.
However, in read processing (processing for reading out arbitrary data from the controller to the SOC) and a write processing (processing for writing arbitrary data in the controller from the SOC), the controller requires fixed time. Therefore, since processing time in the controller is secured, the time required for access of the bus cannot be reduced.